The present invention generally relates to processing a semiconductor substrate. In particular, the present invention relates to methods of forming a high quality low k material layer on a semiconductor substrate using a supercritical fluid.
High performance integrated circuit chips contain of millions of transistors that perform various functions including random access memory, central processing communications, and the like. Each of the transistors is interconnected with electrically conducting elements. In order to efficiently accomplish this on a single chip, a typical integrated circuit chip contains multiple layers of conducting elements. Since there are size constraints associated with placing millions of conducting elements on a chip having an area of only a few square centimeters, the connecting elements themselves are very small, and the distance that separates conducting elements is small as well. For example, a state-of-the-art integrated circuit produced today has a conductor width of 0.18 to 0.25 xcexcm and conductor spacing of 0.18 to 0.25 xcexcm.
Dielectric materials are widely used in the semiconductor industry to separate structures on an integrated circuit chip, such as separating metal interconnect layers from active devices. Dielectrics are also used to separate two adjacent metal interconnect layers to prevent shorting between the metal layers. With an increasing number of levels in integrated circuit chips, there is growing emphasis on the quality of so-called interlevel dielectrics. This is because multiple levels of metal interconnects are necessary in order to achieve higher packing densities and smaller chip sizes with increased circuit complexity.
The smaller geometries raise certain electrical performance problems that are not of concern in older generation integrated circuits. The reduced spacing results in increased electrical capacitance, which in turn causes capacitative interconnect delay that can slow down the operational speed of the circuit. Increased capacitance increases the amount of power that the integrated circuit requires to operate. Increased capacitance also causes cross-talk that can result in generating signal errors.
Since the dimensions of current integrated circuits are constrained, and since the trend is to continue decreasing geometries, it is necessary to reduce the capacitance in integrated circuit chips. Conventional semiconductor fabrication commonly uses high density or conventional silicon dioxide and/or spin-on glass as a dielectric.
One disadvantage associated with high density silicon dioxide and/or spin-on glass dielectrics is their relatively high permitivity or dielectric constant. Typically, high density silicon dioxide and/or spin-on glass have a relative (to permitivity of free space) dielectric constant of 3.9 or higher. High dielectric constant materials produce capacitive loads on the adjacent conductors which degrades performance of both high frequency and high density transistors.
Another disadvantage associated with high density silicon dioxide and/or spin-on glass dielectrics is that thicker dielectric layers are required to compensate for the high dielectric constant. Thicker layers result in larger geometry devices, increasing the overall size and cost of the integrated circuit chip while reducing functionality. Additionally, thick dielectric layers increase planarization problems, making it difficult to form multi-layer metallizations on top of the dielectrics.
An important factor for judging the quality of a dielectric is dielectric strength. Dielectric strength is typically referred to as breakdown voltage or breakdown field strength. Breakdown field strength is a property with units of volts per unit length at which an insulative material does not insulate, breaks down and results in a short circuit. Calculating the required minimum breakdown field strength for an integrated circuit involves taking the operating voltage of the circuit and dividing it by the separation distance between adjacent conducting elements. For example, in a 0.25 xcexcm technology integrated circuit that operates at a voltage of 3.3 volts, the minimum breakdown field strength required is 3.3 volts divided by 0.25 microns, which equals 13.2 V/xcexcm, or 0.132 MV/cm. Typical safety margins are several times this or a minimum of about 0.5 MV/cm. The breakdown field strength of air is less than 1 volt per micron. Another factor for judging the quality of a dielectric is leakage current. Leakage current is low level current flux through an insulator of field strength less than the breakdown field strength. A typical requirement for an integrated circuit is a leakage current density less than 2xc3x9710xe2x88x928 amps/cm2 and an applied electric field strength of 0.05 MV/cm.
Generally speaking, therefore, it is desirable to provide a dielectric material layer with a high breakdown field strength and low leakage current. Low k material layers are attractive in this respect because they possess both high breakdown field strength and low leakage current. However, there are problems associated with forming low k material layers. For instance, heat causes deleterious structural damage to a low k material layer or film (structural collapse of the low k material). Temperatures as low as 350xc2x0 C. can cause such damage in certain low k material layers. This is a problem because semiconductor processing often involves high temperature steps. Consequently, various layers used in fabricating semiconductor devices must be able to withstand high temperatures.
Another problem associated with low k material layers involves solvent removal after application. Incomplete solvent removal leads to undesirable increases in the dielectric constant of the subsequently formed low k material layer. Increases in the dielectric constant consequently degrade the electrical properties and thus the reliability of the electronic devices made with such low k materials. Incomplete solvent removal also provides a failure mechanism for a device formed with the low k material layer, since the unremoved solvent may vaporize out of the layer and damage another layer or structure within the device. Incomplete solvent removal is therefore a significant concern.
Yet another problem associated with low k material layers involves solvent removal by evaporation from low k material layers, in that evaporation creates high surface tension forces that sometimes induces deleterious structural collapse of the low k material layer.
The present invention provides methods for making semiconductor structures with low k insulation materials using a supercritical fluid. The present invention also provides methods for forming high quality low k material layers in semiconductor structures by minimizing and/or eliminating residual solvents in the low k material layers. The high quality low k material layers leads to the formation of electronic devices having desirable electrical properties. The low k material layers made in accordance with the present invention have at least one of high temperature stability, the absence of residual solvent, a desirable structural network, high breakdown field strength and low leakage current.
One aspect of the present invention relates to a method of forming a low k material layer on a semiconductor substrate, involving the steps of depositing a mixture containing a low k material and a casting solvent on the semiconductor substrate; optionally contacting the mixture with a transition solvent whereby the casting solvent is removed from the mixture to form a second mixture containing the low k material and the transition solvent; contacting the mixture or second mixture with a supercritical fluid whereby the casting solvent or the transition solvent is removed from the mixture or the second mixture; and permitting the supercritical fluid to evaporate thereby forming the low k material layer.
Another aspect the present invention relates to a method processing a low k material, involving the steps of depositing a mixture comprising the low k material and a casting solvent on a semiconductor substrate wherein the casting solvent comprises at least one of deionized water, a water based dispersion, a water-in-oil emulsion, an oil-in-water emulsion, benzenes, chlorobenzenes, anisole, cyclohexanone, a lower alkyl alcohol, a lower alkyl ketone, and a lower alkyl ester, wherein each alkyl group has 5 or less carbon atoms; contacting the mixture with a transition solvent whereby the casting solvent is removed from the mixture to form a second mixture comprising the low k material and the transition solvent, wherein the transition solvent comprises at least one of a lower alkyl alcohol, a lower alkyl ketone, and a lower alkyl ester, wherein each alkyl group has 5 or less carbon atoms; contacting the second mixture with a supercritical fluid whereby the transition solvent is removed from the second mixture; and permitting the supercritical fluid to evaporate thereby forming a low k material layer having a dielectric constant below about 3.8.
Yet another aspect of the present invention relates to a method of making a low k dieletric layer, involving the steps of depositing a mixture comprising a low k material and a casting solvent on a semiconductor substrate; contacting the mixture with an organic solvent whereby the casting solvent is removed from the mixture to form a second mixture comprising the low k material and the organic solvent, wherein the organic solvent comprises at least one of a ketone, an ester, an alcohol, an ether, and an aromatic hydrocarbon; contacting the second mixture with a supercritical fluid using spin coating whereby the organic solvent is removed from the second mixture, wherein the supercritical fluid comprises at least one of CO2, N2O, C2H6, CFH3, H2O, NH3, and CClF3; and permitting the supercritical fluid to evaporate thereby forming the low k dieletric layer having a dielectric constant below about 3.